
134
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
Power-off the chip
Power-on the chip with TST = 0
Assert Erase during a period of more than 220 ms
Power-off the chip
Then it is possible o return to FFPI mode and check that Flash is erased.
20.2.5.7
SAM7S512 Select EFC Command
The commands WPx, EA, xLB, xFB are executed using the current EFC controller. The default EFC controller is
EFC0. The Select EFC command (SEFC) allows selection of the current EFC controller.
20.2.5.8
Memory Write Command
This command is used to perform a write access to any memory location.
The Memory Write command (WRAM) is optimized for consecutive writes. Write handshaking can be chained; an
internal address buffer is automatically increased.
Table 20-16. Select EFC Command
Step
Handshake Sequence
MODE[3:0]
DATA[15:0]
1
Write handshaking
CMDE
SEFC
2
Write handshaking
DATA
0 = Select EFC0
1 = Select EFC1
Table 20-17. Write Command
Step
Handshake Sequence
MODE[3:0]
DATA[15:0]
1
Write handshaking
CMDE
WRAM
2
Write handshaking
ADDR0
Memory Address LSB
3
Write handshaking
ADDR1
Memory Address
4
Write handshaking
DATA
*Memory Address++
5
Write handshaking
DATA
*Memory Address++
...
n
Write handshaking
ADDR0
Memory Address LSB
n+1
Write handshaking
ADDR1
Memory Address
n+2
Write handshaking
DATA
*Memory Address++
n+3
Write handshaking
DATA
*Memory Address++
...
Table 20-18. Write Command
Step
Handshake Sequence
MODE[3:0]
DATA[7:0]
1
Write handshaking
CMDE
WRAM
2
Write handshaking
ADDR0
Memory Address LSB
3
Write handshaking
ADDR1
Memory Address
4
Write handshaking
ADDR2
Memory Address
5
Write handshaking
ADDR3
Memory Address